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  • 大小: 103KB
    文件類型: .zip
    金幣: 2
    下載: 0 次
    發布日期: 2021-06-19
  • 語言: 其他
  • 標簽: AES??

資源簡介

完整的AES加密的verilog代碼，經過驗證在FPGA內可以實現，而且還附帶相應的仿真環境和可以執行的腳本文件，極具參考價值，一種典型的AES加密的verilog實現方式

資源截圖

代碼片段和文件信息

?屬性????????????大小?????日期????時間???名稱
-----------?---------??----------?-----??----
?????目錄???????????0??2017-07-17?10:05??aes_core\
?????目錄???????????0??2017-07-17?10:05??aes_core\CVS\
?????文件??????????56??2006-04-06?22:35??aes_core\CVS\Entries
?????文件??????????22??2006-04-06?22:35??aes_core\CVS\Entries.Extra
?????文件???????????0??2006-04-06?22:35??aes_core\CVS\Entries.Extra.Old
?????文件??????????67??2006-04-06?22:36??aes_core\CVS\Entries.Log
?????文件???????????0??2006-04-06?22:35??aes_core\CVS\Entries.Old
?????文件??????????10??2006-04-06?22:35??aes_core\CVS\Repository
?????文件??????????57??2006-04-06?22:35??aes_core\CVS\Root
?????文件???????????0??2006-04-06?22:35??aes_core\CVS\Template
?????目錄???????????0??2005-07-23?14:00??aes_core\bench\
?????目錄???????????0??2005-07-23?14:00??aes_core\bench\CVS\
?????文件???????????3??2006-04-06?22:35??aes_core\bench\CVS\Entries
?????文件???????????0??2006-04-06?22:35??aes_core\bench\CVS\Entries.Extra
?????文件???????????0??2006-04-06?22:35??aes_core\bench\CVS\Entries.Extra.Old
?????文件??????????17??2006-04-06?22:35??aes_core\bench\CVS\Entries.Log
?????文件???????????0??2006-04-06?22:35??aes_core\bench\CVS\Entries.Old
?????文件??????????16??2006-04-06?22:35??aes_core\bench\CVS\Repository
?????文件??????????57??2006-04-06?22:35??aes_core\bench\CVS\Root
?????文件???????????0??2006-04-06?22:35??aes_core\bench\CVS\Template
?????目錄???????????0??2017-07-17?10:05??aes_core\bench\verilog\
?????目錄???????????0??2005-07-23?14:00??aes_core\bench\verilog\CVS\
?????文件??????????53??2006-04-06?22:35??aes_core\bench\verilog\CVS\Entries
?????文件??????????23??2006-04-06?22:35??aes_core\bench\verilog\CVS\Entries.Extra
?????文件???????????0??2006-04-06?22:35??aes_core\bench\verilog\CVS\Entries.Extra.Old
?????文件???????????0??2006-04-06?22:35??aes_core\bench\verilog\CVS\Entries.Old
?????文件??????????24??2006-04-06?22:35??aes_core\bench\verilog\CVS\Repository
?????文件??????????57??2006-04-06?22:35??aes_core\bench\verilog\CVS\Root
?????文件???????????0??2006-04-06?22:35??aes_core\bench\verilog\CVS\Template
?????文件???????37504??2002-11-13?00:10??aes_core\bench\verilog\test_bench_top.v
?????目錄???????????0??2017-07-17?10:05??aes_core\doc\
............此處省略110個文件信息

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