?屬性????????????大小?????日期????時(shí)間???名稱
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?????目錄???????????0??2019-04-26?10:58??聲控?zé)粼韴D\
?????文件??????130560??2019-04-26?10:58??聲控?zé)粼韴D\AT-89-C51.Sch
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?????目錄???????????0??2019-04-26?10:58??聲控?zé)粼韴D\History\
?????目錄???????????0??2019-04-26?10:58??聲控?zé)粼韴D\History\FBE783E3\
?????文件????????5417??2019-04-26?10:58??聲控?zé)粼韴D\History\FBE783E3\AT-89-C51.~（1）.Sch.Zip
?????文件???????13965??2019-04-26?10:58??聲控?zé)粼韴D\History\FBE783E3\AT-89-C51.~（2）.Sch.Zip
?????文件???????13965??2019-04-26?10:58??聲控?zé)粼韴D\History\FBE783E3\AT-89-C51.~（3）.Sch.Zip
?????文件???????13966??2019-04-26?10:58??聲控?zé)粼韴D\History\FBE783E3\AT-89-C51.~（4）.Sch.Zip
?????文件???????13965??2019-04-26?10:58??聲控?zé)粼韴D\History\FBE783E3\AT-89-C51.~（5）.Sch.Zip
?????文件????????3692??2019-04-26?10:58??聲控?zé)粼韴D\History\PCB_Project1.~（1）.PrjPCB.Zip
?????文件????????3731??2019-04-26?10:58??聲控?zé)粼韴D\History\PCB_Project1.~（2）.PrjPCB.Zip
?????文件???????31198??2019-04-26?10:58??聲控?zé)粼韴D\PCB_Project1.PrjPCB
?????文件????????4096??2019-04-26?10:48??聲控?zé)粼韴D\Schlib1.SchLib
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