#include?“work/test/test.h“
#include?“work/glbl/glbl.h“
static?const?char?*?HSimCopyRightNotice?=?“Copyright?2004-2005?Xilinx?Inc.?All?rights?reserved.“;


#include?“work/test/test.h“
static?HSim__s6*?IF0（HSim__s6?*?Arch
const?char*?label?
int?nGenerics?
va_list?vap）
{
????HSim__s6?*blk?=?new?workMtest（label）;?
????return?blk;
}


#include?“simprim_ver.auxlib/ffsrce/ffsrce.h“
static?HSim__s6*?IF1（HSim__s6?*?Arch
const?char*?label?
int?nGenerics?
va_list?vap）
{
????HSim__s6?*blk?=?new?simprim_ver_auxlibMffsrce（label）;?
????return?blk;
}


#include?“simprim_ver.auxlib/x__lut4__mux4/x__lut4__mux4.h“
static?HSim__s6*?IF2（HSim__s6?*?Arch
const?char*?label?
int?nGenerics?
va_list?vap）
{
????HSim__s6?*blk?=?new?simprim_ver_auxlibMx__lut4__mux4（label）;?
????return?blk;
}


#include?“simprim_ver.auxlib/_x___b_u_f/_x___b_u_f.h“
static?HSim__s6*?IF3（HSim__s6?*?Arch
const?char*?label?
int?nGenerics?
va_list?vap）
{
????HSim__s6?*blk?=?new?simprim_ver_auxlibM_x___b_u_f（label）;?
????return?blk;
}


#include?“simprim_ver.auxlib/_x___b_u_f_g_m_u_x/_x___b_u_f_g_m_u_x.h“
static?HSim__s6*?IF4（HSim__s6?*?Arch
const?char*?label?
int?nGenerics?
va_list?vap）
{
????HSim__s6?*blk?=?new?simprim_ver_auxlibM_x___b_u_f_g_m_u_x（label）;?
????return?blk;
}


#include?“simprim_ver.auxlib/_x___f_f/_x___f_f.h“
static?HSim__s6*?IF5（HSim__s6?*?Arch
const?char*?label?
int?nGenerics?
va_list?vap）
{
????HSim__s6?*blk?=?new?simprim_ver_auxlibM_x___f_f（label）;?
????return?blk;
}


#include?“simprim_ver.auxlib/_x___f_f/_x___f_f.h“
static?HSim__s6*?IF6（HSim__s6?*?Arch
const?char*?label?
int?nGenerics?
va_list?vap）
{
????HSim__s6?*blk?=?new?simprim_ver_auxlibM_x___f_f（label）;?
????return?blk;
}


#include?“simprim_ver.auxlib/_x___i_n_v/_x___i_n_v.h“
static?HSim__s6*?IF7（HSim__s6?*?Arch
const?char*?label?
int?nGenerics?
va_list?vap）
{
????HSim__s6?*blk?=?new?simprim_ver_auxlibM_x___i_n_v（label）;?
????return?blk;
}


#include?“simprim_ver.auxlib/_x___i_p_a_d/_x___i_p_a_d.h“
static?HSim__s6*?IF8（HSim__s6?*?Arch
const?char*?label?
int?nGenerics?
va_list?vap）
{
????HSim__s6?*blk?=?new?simprim_ver_auxlibM_x___i_p_a_d（label）;?
????return?blk;
}


#include?“simprim_ver.auxlib/_x___l_u_t4/_x___l_u_t4.h“
static?HSim__s6*?IF9（HSim__s6?*?Arch
const?char*?label?
int?nGenerics?
va_list?vap）
{
????HSim__s6?*blk?=?new?simprim_ver_auxlibM_x___l_u_t4（label）;?
????return?blk;
}


#include?“simprim_ver.auxlib/_x___l_u_t4/_x___l_u_t4.h“
static?HSim__s6*?IF10（HSim__s6?*?Arch
const?char*?label?
int?nGenerics?
va_list?vap）
{
????HSim__s6?*blk?=?new?simprim_ver_auxlibM_x___l_u_t4（label）;?
????return?blk;
}


#include?“simprim_ver.auxlib/_x___o_n_e/_x___o_n_e.h“
static?HSim__s6*?IF11（HSim__s6?*?Arch
const?char*?label?
int?nGenerics?
va_list?vap）
{
????HSim__s6?*blk?=?new?simprim_ver_auxlibM_x___o_n_e（label）;?
????return?blk;
}


#include?“simprim

?屬性????????????大小?????日期????時(shí)間???名稱
-----------?---------??----------?-----??----

?????文件???????3697??2006-06-07?12:04??_1?AlteraFPGAе_FPGA\實(shí)戰(zhàn)訓(xùn)練1?2.5?在Altera的FPGA開發(fā)板上運(yùn)行第一個(gè)FPGA程序\liangzhu.v

?????文件??????????0??2008-04-22?15:13??_2?XilinxFPGAе_FPGA\實(shí)戰(zhàn)訓(xùn)練2?在Xilinx的FPGA開發(fā)板上運(yùn)行第一個(gè)FPGA程序\project\automake.log

?????文件????????473??2008-04-22?15:13??_2?XilinxFPGAе_FPGA\實(shí)戰(zhàn)訓(xùn)練2?在Xilinx的FPGA開發(fā)板上運(yùn)行第一個(gè)FPGA程序\project\bitgen.ut

?????文件???????1202??2006-10-02?09:49??_2?XilinxFPGAе_FPGA\實(shí)戰(zhàn)訓(xùn)練2?在Xilinx的FPGA開發(fā)板上運(yùn)行第一個(gè)FPGA程序\project\isim\work\glbl\glbl.h

?????文件??????31755??2006-10-02?09:49??_2?XilinxFPGAе_FPGA\實(shí)戰(zhàn)訓(xùn)練2?在Xilinx的FPGA開發(fā)板上運(yùn)行第一個(gè)FPGA程序\project\isim\work\glbl\mingw\glbl.obj

?????文件????????256??2006-10-02?10:10??_2?XilinxFPGAе_FPGA\實(shí)戰(zhàn)訓(xùn)練2?在Xilinx的FPGA開發(fā)板上運(yùn)行第一個(gè)FPGA程序\project\isim\work\hdllib.ref

?????文件????????655??2006-10-02?10:10??_2?XilinxFPGAе_FPGA\實(shí)戰(zhàn)訓(xùn)練2?在Xilinx的FPGA開發(fā)板上運(yùn)行第一個(gè)FPGA程序\project\isim\work\hdpdeps.ref

?????文件??????60996??2006-10-02?10:10??_2?XilinxFPGAе_FPGA\實(shí)戰(zhàn)訓(xùn)練2?在Xilinx的FPGA開發(fā)板上運(yùn)行第一個(gè)FPGA程序\project\isim\work\sw__led\mingw\sw__led.obj

?????文件????????895??2006-10-02?10:10??_2?XilinxFPGAе_FPGA\實(shí)戰(zhàn)訓(xùn)練2?在Xilinx的FPGA開發(fā)板上運(yùn)行第一個(gè)FPGA程序\project\isim\work\sw__led\sw__led.h

?????文件?????127624??2006-10-02?10:10??_2?XilinxFPGAе_FPGA\實(shí)戰(zhàn)訓(xùn)練2?在Xilinx的FPGA開發(fā)板上運(yùn)行第一個(gè)FPGA程序\project\isim\work\test\mingw\test.obj

?????文件???????5722??2006-10-02?10:10??_2?XilinxFPGAе_FPGA\實(shí)戰(zhàn)訓(xùn)練2?在Xilinx的FPGA開發(fā)板上運(yùn)行第一個(gè)FPGA程序\project\isim\work\test\test.h

?????文件???????9735??2006-10-02?10:10??_2?XilinxFPGAе_FPGA\實(shí)戰(zhàn)訓(xùn)練2?在Xilinx的FPGA開發(fā)板上運(yùn)行第一個(gè)FPGA程序\project\isim\work\test\xsimtest.cpp

?????文件??????33986??2006-10-02?10:10??_2?XilinxFPGAе_FPGA\實(shí)戰(zhàn)訓(xùn)練2?在Xilinx的FPGA開發(fā)板上運(yùn)行第一個(gè)FPGA程序\project\isim\work\vlg22\sw__led.bin

?????文件???????3382??2006-10-02?09:49??_2?XilinxFPGAе_FPGA\實(shí)戰(zhàn)訓(xùn)練2?在Xilinx的FPGA開發(fā)板上運(yùn)行第一個(gè)FPGA程序\project\isim\work\vlg2D\glbl.bin

?????文件??????14414??2006-10-02?10:10??_2?XilinxFPGAе_FPGA\實(shí)戰(zhàn)訓(xùn)練2?在Xilinx的FPGA開發(fā)板上運(yùn)行第一個(gè)FPGA程序\project\isim\work\vlg34\test.bin

?????文件?????????81??2006-10-11?08:59??_2?XilinxFPGAе_FPGA\實(shí)戰(zhàn)訓(xùn)練2?在Xilinx的FPGA開發(fā)板上運(yùn)行第一個(gè)FPGA程序\project\isim.cmd

?????文件????????118??2006-10-11?08:59??_2?XilinxFPGAе_FPGA\實(shí)戰(zhàn)訓(xùn)練2?在Xilinx的FPGA開發(fā)板上運(yùn)行第一個(gè)FPGA程序\project\isim.hdlsourcefiles

?????文件????????552??2006-10-02?10:05??_2?XilinxFPGAе_FPGA\實(shí)戰(zhàn)訓(xùn)練2?在Xilinx的FPGA開發(fā)板上運(yùn)行第一個(gè)FPGA程序\project\isim.log

?????文件???????1228??2006-10-11?08:59??_2?XilinxFPGAе_FPGA\實(shí)戰(zhàn)訓(xùn)練2?在Xilinx的FPGA開發(fā)板上運(yùn)行第一個(gè)FPGA程序\project\isim.tmp_save\_1

?????文件???????6444??2006-10-11?09:08??_2?XilinxFPGAе_FPGA\實(shí)戰(zhàn)訓(xùn)練2?在Xilinx的FPGA開發(fā)板上運(yùn)行第一個(gè)FPGA程序\project\isimwavedata.xwv

?????文件??????????0??2006-10-02?09:49??_2?XilinxFPGAе_FPGA\實(shí)戰(zhàn)訓(xùn)練2?在Xilinx的FPGA開發(fā)板上運(yùn)行第一個(gè)FPGA程序\project\results.txt

?????文件???????1356??2006-10-02?10:10??_2?XilinxFPGAе_FPGA\實(shí)戰(zhàn)訓(xùn)練2?在Xilinx的FPGA開發(fā)板上運(yùn)行第一個(gè)FPGA程序\project\simprim_ver.auxlib\ffsrce\ffsrce.h

?????文件?????214411??2006-10-02?10:10??_2?XilinxFPGAе_FPGA\實(shí)戰(zhàn)訓(xùn)練2?在Xilinx的FPGA開發(fā)板上運(yùn)行第一個(gè)FPGA程序\project\simprim_ver.auxlib\ffsrce\mingw\ffsrce.obj

?????文件???????1098??2006-10-02?10:10??_2?XilinxFPGAе_FPGA\實(shí)戰(zhàn)訓(xùn)練2?在Xilinx的FPGA開發(fā)板上運(yùn)行第一個(gè)FPGA程序\project\simprim_ver.auxlib\hdllib.ref

?????文件??????24674??2006-10-02?10:10??_2?XilinxFPGAе_FPGA\實(shí)戰(zhàn)訓(xùn)練2?在Xilinx的FPGA開發(fā)板上運(yùn)行第一個(gè)FPGA程序\project\simprim_ver.auxlib\x__lut4__mux4\mingw\x__lut4__mux4.obj

?????文件???????1093??2006-10-02?10:10??_2?XilinxFPGAе_FPGA\實(shí)戰(zhàn)訓(xùn)練2?在Xilinx的FPGA開發(fā)板上運(yùn)行第一個(gè)FPGA程序\project\simprim_ver.auxlib\x__lut4__mux4\x__lut4__mux4.h

?????文件??????17367??2006-10-02?10:10??_2?XilinxFPGAе_FPGA\實(shí)戰(zhàn)訓(xùn)練2?在Xilinx的FPGA開發(fā)板上運(yùn)行第一個(gè)FPGA程序\project\simprim_ver.auxlib\_x___b_u_f\mingw\_x___b_u_f.obj

?????文件????????979??2006-10-02?10:10??_2?XilinxFPGAе_FPGA\實(shí)戰(zhàn)訓(xùn)練2?在Xilinx的FPGA開發(fā)板上運(yùn)行第一個(gè)FPGA程序\project\simprim_ver.auxlib\_x___b_u_f\_x___b_u_f.h

?????文件??????65663??2006-10-02?10:10??_2?XilinxFPGAе_FPGA\實(shí)戰(zhàn)訓(xùn)練2?在Xilinx的FPGA開發(fā)板上運(yùn)行第一個(gè)FPGA程序\project\simprim_ver.auxlib\_x___b_u_f_g_m_u_x\mingw\_x___b_u_f_g_m_u_x.obj

?????文件???????1110??2006-10-02?10:10??_2?XilinxFPGAе_FPGA\實(shí)戰(zhàn)訓(xùn)練2?在Xilinx的FPGA開發(fā)板上運(yùn)行第一個(gè)FPGA程序\project\simprim_ver.auxlib\_x___b_u_f_g_m_u_x\_x___b_u_f_g_m_u_x.h

............此處省略557個(gè)文件信息